FAQ - Counters

Q1: When building a divide by N counter, how do I compute max count?

Q2: How do I build counters with toggle cells?

Q1:
When we are supposed to design the divide by 6 counter and the buffer
is on wire Q1. For the divide by 7 counter, the buffer is on wire
Q0. How do you determine which wire the buffer is supposed to be
placed on?

The max count signal indicates when the maximum value (N - 1) is
reached. This is implemented by ANDing binary counter outputs that
are high and complemented outputs that are low to produce the max
count output. Since the counter always counts up from zero,
simplification is sometimes possible. For example, on a divide by 6
counter, the max count should occur at O2=1, O1 = 0, O0=1. If we AND
only O2 and O0, the max detector cannot differentiate between "5" and
"7". But since "7" is never reached as the counter resets following
"5", this is not a problem.

Q2:
[Exam Two SP08] Third Exam Questions; With the counter, why do you
connect the the output of the and gate preceding the second toggle
cell to the input of the and gate before the third toggle cell instead
anding the O1 with solely the count enable?

Because each toggle cell should only toggle when all subsequent T cells
are high AND the external count enable is high